PC Pro Course Schedule (801-802)

Week 1 (Sep. 8 – 12, 2014)

LabSim Sec. 1: Computing Overview (4 subsections)

LabSim Sec. 2: PC Technician (5 subsections)


Week 2 (Sep. 15 – 19, 2014)

LabSim Sec. 3: System Components (10 subsections)


Week 3 (Sep. 22 – 26, 2014)

LabSim Sec. 4: Peripheral Devices (6 subsections)

LabSim Sec. 5: Storage (10 subsections)



Week 4 (Sep. 29 – Oct. 3, 2014)

LabSim Sec. 6: Networking (14 subsections)


Week 5 (Oct. 6 – 10, 2014)

LabSim Sec.7: Printing (5 subsections)

LabSim Sec. 8: Mobile Devices (4 subsections)


Week 6 (Oct. 13 – 17, 2014)

LabSim Sec. 9: Windows System Management (9 subsections)

LabSim Sec. 10: System Implementation (5 subsections)


Week 7 (Oct. 21 – 27, 2014)

LabSim Sec. 11: File Management (5 subsections)

LabSim Sec.12: Security (10 subsections)


Week 8 (Oct. 28 – Nov. 3, 2014)

LabSim Sec. 13: Troubleshooting (11 subsections)

LabSim Sec. 14: Capstone Exercises (2 subsections)


Week 9 (Nov. 4 – 9, 2014)

LabSim Sec. PC Pro Practice ExamsCertification Exam ) (15 subsections)


DDR SDRAM Explained

DRAM is asynchronous, meaning it operates independently of the CPU and the system bus’ clock cycle. SDRAM is synchronous, meaning its operation is dependent on the data bus’ clock cycle (as is the CPU). This synchronicity translates to faster data transfers between memory and the CPU.

SDR (Single Data Rate) SDRAM sends one bit per clock cycle. DDR (Double Data Rate) SDRAM sends two bits per clock cycle (on both the rising and the falling edges of each clock cycle). DDR2 achieves speeds twice as fast as DDR by using an internal clock that runs at double the speed.


The maximum transfer rate for a memory module can be calculated with the following formula:

Maximum Transfer Rate = (clock rate in MHz) x (number of bits) / 8 (the reason for dividing by 8 is to convert bits to Bytes)

Since DIMM modules transfer 64 bits at a time, “number of bits” will always be 64. Since 64 / 8 = 8, we can simplify this formula to:

Maximum Theoretical Transfer Rate = clock rate x 8


DDR2-400 / PC2-3200 Memory Module

Has a 400MHz clock cycle (real clock = 200MHz, doubled), so it can send/receive 400M bits per second

To determine Bandwidth (Transfer Rate), multiply:

400M (Hz) x 8 (bits) = 3200 MB/s


IPv6 Neighbor Discovery Process (IPv6 Neighbor Discovery, SLAAC, Default Gateway assignment)

IPv6 Neighbor Discovery Process

  • Determines the link-local address of a neighbor-devices (all devices on the same  link/LAN)
  • Verifies the reachability of a neighbor
  • Keeps track of neighboring devices


IPv6 Neighbor Solicitation Message

  • Sent on the local link when a node wants to determine the link-layer address of another node on the same local link (see the figure below). When a node wants to determine the link-layer address of another node, the source address in a neighbor solicitation message is the IPv6 address of the node sending the neighbor solicitation message. The destination address in the neighbor solicitation message is the solicited-node multicast address that corresponds to the IPv6 address of the destination node. The neighbor solicitation message also includes the link-layer address of the source node.


Reference: http://www.cisco.com/c/en/us/td/docs/ios-xml/ios/ipv6_basic/configuration/xe-3s/ip6b-xe-3s-book/ip6-neighb-disc-xe.html



IPv6 Link-layer addresses appear to be the same as Link-local addresses (are they TECHNICALLY the same?)


Surveillance Self Defense

Surveillance Self-Defense (SSD), a project of the Electronic Frontier Foundation (EFF), exists to answer two main questions: What can the government legally do to spy on your computer data and communications? And what can you legally do to protect yourself against such spying?

The Surveillance Self-Defense site aims to educate the American public about the law and technology of government surveillance in the United States, providing the information and tools necessary to evaluate the threat of surveillance and take appropriate steps to defend against it.

Technical Instructor